The present invention relates to data storage techniques, and more particularly to a data storage technique useful for processing data strings represented by a language (a logic type language such as PROLOG or LISP) with which inference is possible, and to semiconductor data storage devices which can be readily implemented in the form of a large scale integrated circuit.
Various types of data storage devices have been known which are employed in a general purpose computer, a work station, a translation machine or the like. For example, different kinds of RAMS (Random Access Memories) made of integrated semiconductors are reported in literatures, for example, "Semiconductor Handbook", OHM-sha, Nov. 30, 1977, pp. 753-763.
In the RAM described in the above literature, addressing is made to plural storage cells respectively so that data are written in and read out from those storage cells which are addressed.
According to the above-described conventional technique, data sets, which represent the knowledge and inference rules required for the process of the logic type language used for an artificial intelligence or the like, are stored in the conventional general purpose RAM or an auxiliary memory unit, retrieval of a data set having a specific format and content for unification (referred to simply as "retrieval of unification candidate clause" hereinafter) and management of the data sets are carried out by a CPU using a software. Therefore, the retrieval of unification candidate clause requires a large amount of time, and the processing speed and the throughput of the logic type language processing system cannot be improved.
Further, JP-A-62-209617 (laid open on Sep. 14, 1987) discloses a retrieval stystem in which knowledge representation is accomplished in the form of frames and use is made of a hash table for high speed retrieval. JP-A-61-177700 (laid open on Aug. 9, 1986) discloses a multi-association memory having a hardware for retrieval of data strings hit by a plurality of retrieval keys.